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01: /* Copyright (C) 2001, 2003 Free Software Foundation, Inc. 02: This file is part of the GNU C Library. 03: 04: The GNU C Library is free software; you can redistribute it and/or 05: modify it under the terms of the GNU Lesser General Public 06: License as published by the Free Software Foundation; either 07: version 2.1 of the License, or (at your option) any later version. 08: 09: The GNU C Library is distributed in the hope that it will be useful, 10: but WITHOUT ANY WARRANTY; without even the implied warranty of 11: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12: Lesser General Public License for more details. 13: 14: You should have received a copy of the GNU Lesser General Public 15: License along with the GNU C Library; if not, write to the Free 16: Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 17: 02111-1307 USA. */ 18: 19: #ifndef _SYS_DEBUGREG_H 20: #define _SYS_DEBUGREG_H 1 21: #include <bits/wordsize.h> 22: 23: /* Indicate the register numbers for a number of the specific 24: debug registers. Registers 0-3 contain the addresses we wish to trap on */ 25: #define DR_FIRSTADDR 0 /* u_debugreg[DR_FIRSTADDR] */ 26: #define DR_LASTADDR 3 /* u_debugreg[DR_LASTADDR] */ 27: 28: #define DR_STATUS 6 /* u_debugreg[DR_STATUS] */ 29: #define DR_CONTROL 7 /* u_debugreg[DR_CONTROL] */ 30: 31: /* Define a few things for the status register. We can use this to determine 32: which debugging register was responsible for the trap. The other bits 33: are either reserved or not of interest to us. */ 34: 35: #define DR_TRAP0 (0x1) /* db0 */ 36: #define DR_TRAP1 (0x2) /* db1 */ 37: #define DR_TRAP2 (0x4) /* db2 */ 38: #define DR_TRAP3 (0x8) /* db3 */ 39: 40: #define DR_STEP (0x4000) /* single-step */ 41: #define DR_SWITCH (0x8000) /* task switch */ 42: 43: /* Now define a bunch of things for manipulating the control register. 44: The top two bytes of the control register consist of 4 fields of 4 45: bits - each field corresponds to one of the four debug registers, 46: and indicates what types of access we trap on, and how large the data 47: field is that we are looking at */ 48: 49: #define DR_CONTROL_SHIFT 16 /* Skip this many bits in ctl register */ 50: #define DR_CONTROL_SIZE 4 /* 4 control bits per register */ 51: 52: #define DR_RW_EXECUTE (0x0) /* Settings for the access types to trap on */ 53: #define DR_RW_WRITE (0x1) 54: #define DR_RW_READ (0x3) 55: 56: #define DR_LEN_1 (0x0) /* Settings for data length to trap on */ 57: #define DR_LEN_2 (0x4) 58: #define DR_LEN_4 (0xC) 59: #define DR_LEN_8 (0x8) 60: 61: /* The low byte to the control register determine which registers are 62: enabled. There are 4 fields of two bits. One bit is "local", meaning 63: that the processor will reset the bit after a task switch and the other 64: is global meaning that we have to explicitly reset the bit. With linux, 65: you can use either one, since we explicitly zero the register when we enter 66: kernel mode. */ 67: 68: #define DR_LOCAL_ENABLE_SHIFT 0 /* Extra shift to the local enable bit */ 69: #define DR_GLOBAL_ENABLE_SHIFT 1 /* Extra shift to the global enable bit */ 70: #define DR_ENABLE_SIZE 2 /* 2 enable bits per register */ 71: 72: #define DR_LOCAL_ENABLE_MASK (0x55) /* Set local bits for all 4 regs */ 73: #define DR_GLOBAL_ENABLE_MASK (0xAA) /* Set global bits for all 4 regs */ 74: 75: /* The second byte to the control register has a few special 76: things. */ 77: 78: 79: 80: #if __WORDSIZE == 64 81: # define DR_CONTROL_RESERVED (0xFFFFFFFF0000FC00UL) /* Reserved */ 82: #else 83: # define DR_CONTROL_RESERVED (0x00FC00U) /* Reserved */ 84: #endif 85: #define DR_LOCAL_SLOWDOWN (0x100) /* Local slow the pipeline */ 86: #define DR_GLOBAL_SLOWDOWN (0x200) /* Global slow the pipeline */ 87: 88: #endif /* sys/debugreg.h */ 89: