Boolean algebra, standard logic gates, truth tables, Venn diagrams, combinatorial logic, duality, standard logic results, proof by perfect induction, Karnaugh maps.

Asynchronous and clocked logic, half- and full-adders, carry look ahead, latch and flip-flop circuits, master-slave units, common memory types.

Finite State Machines, Moore and Mealy machines, sequencers, synchronous logic, the memory hierarchy, introduction to computer architecture and processor structure.

Amdahl's Law and system performance, the semantic gap, instruction set usage, RISC, CISC and SuperScalar processors, register windows.

Instruction cycle, pipelines, bubbles, stalls and hazards, forwarding and bypassing, branch prediction, scoreboarding.

Spatial and temporal locality, the 90/10 rule, cache systems and their structure, cache lines, cache tags, cache hits and misses, write through and write back systems, associative and direct mapped cache policies, cache replacement algorithms.

Memory overlays, virtual memory, paged and segmented memory systems, page and segment tables, memory fragmentation problems, translation lookaside buffers.

Architectural support for operating systems, user and supervisor modes, privileged instructions, memory protection, base and limit systems.

'State of the Art' processor design, hardware emulation and abstraction (HAL and PAL systems), read/ write ordering, precise and imprecise exception handling.

Pipeline depth tradeoffs, performance, memory layout.